Topics
- BrowsingBench™ Details Revealed at Linley Tech Mobile Conference
- Several Multicore Expo Sessions Focus on EEMBC Benchmarks
- Deep Packet Inspection Benchmark Project Update
- New CoreMark™ Scores
- CoreMark™ Webinar Available for Download
BrowsingBench Details Revealed at Linley Tech Mobile Conference
EEMBC president, Markus Levy will present "Analyzing the Ingredients of a
Portable Mobile Device Benchmark"
at the upcoming Linley Tech Mobile Conference.
Targeted at mobile platforms, BrowsingBench is EEMBC's newest system
benchmark suite and is used to measure the browsing experience.
BrowsingBench employs unique techniques to yield a browser- and
system-agnostic benchmark suite. This presentation will explain these
techniques, as well as other techniques used to ensure compliance and
accurate performance measurements between differing platforms. It will also
provide the first public results of this effort.
Several Multicore Expo Sessions Focus on EEMBC Benchmarks
The Multicore Expo, co-located with the Embedded
Systems Conference (ESC) will include several interesting sessions utilizing
EEMBC benchmark suites. Discounted registration lasts until
March 25.
Here are some short descriptions of those sessions:
"Migrating Serial Code to Utilize a Scalable Number of Local and Networked
Processing Cores", will utilize EEMBC's Networking Suite to show that with
proper technique, and careful attention to the functionality and
synchronization requirements of the code to be optimized, near-linear,
scalable performance gains can be realized as the number of threads
available to that code is increased.
"Analyzing Multi-threaded Applications - Identifying Bottlenecks on
Multicore Systems", will use various multithreaded execution scenarios
generated through EEMBC's MultiBench as stimulus to analyze and identify the
bottlenecks associated with operating systems, application code, and
hardware architecture scalability.
"Challenges Faced in Optimizing JIT Compilers for Multicore Mobile
Platforms", presented by Samsung India Software Operations
utilizes the EEMBC benchmarks to provide quantitative
information regarding the various optimization techiques.
Deep Packet Inspection (DPIBench™) Benchmark Project
Chaired by Jeff Caldwell of SonicWALL, the DPIBench™ working group is
currently reviewing the capabilities of a variety of test equipment to
verify whether their equipment could handle the DPIBench™ workload
requirements.
Membership in this working group is $2,500 for the first year. If you are
interested in joining, please contact Markus Levy, EEMBC president.
New CoreMark™ Scores
Almost 3800 users have downloaded the CoreMark™ benchmark, with more than
200 scores posted to the website. Since our previous newsletter, users have
posted CoreMark™ scores for the following processor/compiler combinations:
Processor |
Compiler |
Intel Atom N330 1.6GHz |
GCC 4.4.1 |
Broadcom BCM6362 MIPS32 SMP 400MHz |
GCC 4.2.3 |
Broadcom BCM6362 MIPS32 400MHz |
GCC 4.2.3 |
Atmel AT91SAM9M10 400Mhz |
GNU GCC 4.5.3 |
NXP LH7A404 200Mhz |
GNU GCC 3.4.1 |
Intel Pentium M 1.30 GHz |
GCC 4.4.5 |
AMD Athlon X2 5000+ 2.6GHz |
GCC 4.4.5 |
Intel Core i3-330M 2.13 GHz |
GCC 4.4.5 |
Intel Core 2 Duo T5500 1.66GHz |
GCC 4.4.5 |
Texas Instruments OMAP3430 600MHz |
GCC 4.2.1 |
Intel Core i7 720QM 1.6GHz |
GCC 4.4.5 |
Intel Core i7 950 3.06GHz |
GCC 4.1.2 20080704 (Red Hat 4.1.2-48) |
CoreMark™ Webinar Available for Download
In case you missed our CoreMark™ webinar a few weeks ago, it is available in
our archives for your viewing pleasure:
Using CoreMark to Demonstrate Performance-Related MCU Features and Compiler
Tradeoffs
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