Topics
- Deep Packet
Inspection Benchmark Project Update
- Update on
BrowsingBench
- Call for Presentations Related to Embedded
Processor Benchmarking
- Floating-Point Working Group
Progress
- New CoreMark Scores
- Speak out on the EEMBC
blog
- Upcoming Events
Deep
Packet Inspection (DPIBenchTM)
Benchmark Project
Chaired by Jeff Caldwell of
SonicWALL, the DPIBench working group continues to move forward on
development of its suite of network security performance
benchmarks for measuring DPI product throughput.
During our
October 27th meeting, we discussed topics such as virus
signature utilization, ramp-up/ramp-down time, and traffic
payload. One of the proposals that we agreed to was that the
DPIBench methodology will use a varying set of virus patterns
injected into the tests based on monthly wildlist.org updates.
This is to validate that devices protect against current threats.
Consideration was also given to achieving exact reproducibility
and the granularity of reported DPIMark numbers.
White paper on this topic.
Example
systems targeted by DPIBench:
-
CheckPoint UTM-1
- Cisco ISR-G2
- Fortinet
Fortigate
- Juniper
Networks SRX
- McAfee Firewall
Enterprise
- Netgear
Prosecure
- Palo Alto
Networks PA Series
- SonicWALL NSA
- Watchguard
Firebox
- Zyxel ZyWALL
Participation
is open to all EEMBC Networking subcommittee and Board of
Directors members. For further information on joining, please
contact Markus
Levy, EEMBC president.
Update on
BrowsingBench
BrowsingBench,
a benchmark to measure the user’s browser experience, is now
in beta, and is available for testing. This benchmark utilizes a
unique approach previously unavailable in any browser-related
benchmark.
Participation
is open to all EEMBC Consumer subcommittee and Board of Directors
members. For further information on joining, please contact Markus
Levy, EEMBC president.
Call
for Presentations Related to Embedded Processor Benchmarking
The
Multicore Technical Conference and Expo is looking for more
interesting presentations related to benchmarking and multicore
processors. For more information and to submit your presentation
title and abstract, go to www.multicore-expo.com
Floating-Point
Working Group Progress
Progress
continues with EEMBC’s new Floating-Point benchmark project.
The overall direction of this working group has been decided and
we are now in the benchmark development phase.
Participation
is open to all EEMBC members. For further information on joining,
please contact Markus
Levy, EEMBC president.
New
CoreMark Scores
Over 2400
users have downloaded the CoreMark
benchmark, with 186 scores posted to the website. During the prior
two months, users have posted CoreMark scores for the following
processor/compiler combinations:
Processor
|
Compiler
|
ICT Loongson 2F (STLS2F01) 800MHz
|
GCC4.4.2
|
HP PA-8600 552MHz
|
GCC4.1.3
|
Microchip PIC32MX795F512L 80MHz
|
Microchip MPLAB C Compiler
|
Microchip PIC32MX795F512L 30MHz
|
Microchip MPLAB C Compiler
|
IBM PowerPC 970 1800MHz
|
GCC4.3.2
|
IBM Cell Broadband Engine 3200MHz
|
GCC4.4.4
|
AMD Athlon II X4 635 2900MHz
|
GCC4.3.5
|
NVIDIA Tegra 250 1GHz
|
gcc 4.4.5
|
Ikanos Fusiv Vx160 200MHz
|
GCC 3.4.3
|
Marvell Kirkwood 88F6281 1.2GHz
|
GCC4.4.5 20100728
|
Broadcom BCM6358 MIPS32 300MHz
|
GCC4.2.3
|
Intel Core Duo T2600 2166 MHz
|
GCC3.4
|
Renesas RSKRX610 100MHz
|
RedHat GNU C version 4.5.1
|
Renesas RSKRX610 25MHz
|
RedHat GNU C version 4.5.1
|
Intel Celeron E3300 2500 MHz
|
GCC4.1.2
|
Nufront NuSmart 2816 (dual-core Cortex-A9)
2.0GHz
|
GCC4.4.1
|
Speak
out on the EEMBC blog
Come
see what we've got to say; we'd also like to hear
from you.
Upcoming
Events
At the Embedded
Software Engineering Kongress, join EEMBC president Markus Levy,
on December 7-9, 2010 — Sindelfingen, Germany, where he will
be presenting "The Challenges, Options, and Advantages of
Designing with Multicore Technology" on December 9 at 9:45am
EEMBC will also be exhibiting. For more information:
www.ese-kongress.de/english
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