Certified Performance Analysis EEMBC Update |
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MultiBench™ is a suite of embedded benchmarks that allows processor and system designers to analyze, test, and improve multicore architectures and platforms. Let us know if you're interested in checking out the demo that includes several of the workloads used in this suite. Send an email to markus.levy@eembc.org.
There will be several related presentations at the upcoming Multicore Expo being held in Santa Clara from March 16-19. Shay Gal-On, Director of Software Engineering for EEMBC will present "Using a MultiBench Methodology to Analyze Multicore System Performance" that will show various architecture independent characteristics of the MultiBench workloads that can be used either to better understand overall performance of a platform, or to zero in on the workloads that matter most to you as they are closest to the activity expected in your system. This presentation will also show the methodology and characteristics that were obtained from traces and instrumentation on CISC and RISC architectures, and analyzed with a variety of tools. Mark Throndson, Director of Marketing for MIPS Technologies will present "Scaling Performance on One Architecture Running Under Linux" that will discuss real-world applications where the combination of coherent multiprocessing and multi-threading can have a significant impact on performance. It will also examine the performance and power consumption of MIPS Technologies' MIPS32 1004K coherent processing system compared to a single-threaded core, using the latest performance data on a variety of EEMBC MultiBench benchmarks. EEMBC will also be exhibiting at Multicore Expo.
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